1. Field of Invention
The present invention relates to a semiconductor device, and more generally to a non-volatile memory.
2. Description of Related Art
A non-volatile memory provides the property of multiple entries, retrievals and erasures of data, and is able to retain the stored information even when the electrical power is off. As a result, non-volatile memory is widely used in personal computers and consumer electronic products.
A conventional non-volatile memory uses an N-type well as a control gate. The control gate of such a non-volatile memory is not a conductive layer stacked on the floating gate but an N-type well disposed in the substrate, so that the steps of depositing the conductive layer and defining the control gate are not required, and only a single polysilicon layer serving as a floating gate is necessary. In such a single-poly non-volatile memory, the programming and erasing operations thereof are performed by respectively injecting channel hot holes (CHEs) and channel hot holes (CHHs). However, the said programming and erasing operations with CHEs and CHHs consume more electrical power and have a narrower operation window.
Further, the N-type well serving as a control gate has to be formed in the substrate, so that the design rule of the single-poly non-volatile memory is different from that of a common double-poly non-volatile memory. For example, in order to form the N-type well serving as a control gate in the substrate, the process for forming the N-type well has to be integrated with a logic circuit fabrication process. That is, the fabrication process of such a non-volatile memory may be integrated with a CMOS transistor process. However, this integration may cause a complicated design in the peripheral circuit of such a non-volatile memory, and the application thereof is seriously limited.